Jesse Brault
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ed6f15a8a9
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Making semantic analysis more flexible so we can have a repl again soon.
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2026-07-10 22:15:51 -05:00 |
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Jesse Brault
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f15ff43df8
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Fix test for overlapping register assignments when k=2.
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2026-07-03 15:29:33 -05:00 |
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Jesse Brault
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a568144ccc
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Fix pass-through configuration of register count.
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2026-07-03 14:58:19 -05:00 |
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Jesse Brault
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46ced3980a
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Some e2e tests passing again. Yay!
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2026-06-26 18:22:56 -05:00 |
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Jesse Brault
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01df9a708f
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Complete sketch of interface between dmc-lib compile functions and other modules.
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2026-06-25 14:49:32 -05:00 |
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Jesse Brault
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737d7b4232
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Much work from semantic analysis to lowering to ir/register alloc to assembly. WIP.
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2026-06-19 17:07:11 -05:00 |
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Jesse Brault
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f9373a687f
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Refactor to use IrBinaryOperation.
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2026-03-15 12:56:22 -05:00 |
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Jesse Brault
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f7e8cef380
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Yay! Class lookup and allocation e2e.
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2026-03-13 20:21:49 -05:00 |
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Jesse Brault
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5be778ba80
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Fix some ir-related things with fields.
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2026-03-13 16:20:08 -05:00 |
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Jesse Brault
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8759c3be27
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Lots of work e2e for reading/setting fields.
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2026-03-13 09:16:41 -05:00 |
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Jesse Brault
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320cdcf805
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Compiling fields getters/setters.
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2026-03-12 21:52:52 -05:00 |
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Jesse Brault
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efecd6b9c8
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Complete negation operator.
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2026-03-11 19:54:47 -05:00 |
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Jesse Brault
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ebca87ddb9
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A lot of work just to do subtraction.
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2026-03-09 19:22:35 -05:00 |
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Jesse Brault
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12c4d0eb83
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End-to-end with register allocation.
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2026-03-08 01:27:09 -06:00 |
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Jesse Brault
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4479fcb1ba
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Refactor register allocation code to separate module.
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2026-03-07 17:53:34 -06:00 |
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Jesse Brault
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272d288213
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Implement block/statement interference graph algorithm.
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2026-03-05 20:41:25 -06:00 |
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Jesse Brault
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15089a15d2
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Re-introduce ir with goal of doing register allocation.
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2026-03-05 12:41:05 -06:00 |
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Jesse Brault
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8c1d56dc1a
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Remove ir structs and fix misc. warnings.
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2026-03-02 20:15:36 -06:00 |
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Jesse Brault
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6b855b8ebb
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Work on asm.
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2026-02-27 21:33:28 -06:00 |
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Jesse Brault
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aefac57b9d
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Starting work on IR.
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2026-02-27 16:26:56 -06:00 |
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